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 HD74LV245A
Octal Bus Transceivers with 3-state Outputs
REJ03D0329-0300Z (Previous ADE-205-247A (Z)) Rev.3.00 Jun. 24, 2004
Description
The HD74LV245A has eight buffers with three-state outputs in a 20-pin package. When DIR is high, data is transferred from the A inputs to the B outputs, and when DIR is low, data is transferred from the B inputs to the A outputs. The A and B buses are separated by making the enable input (OE) high level. Low-voltage operation is suitable for battery-powered products (e.g., notebook computers), and the low power consumption extends the battery life.
Features
* VCC = 2.0 V to 5.5 V operation * All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) * All outputs VO (Max.) = 5.5 V (@VCC = 0 V) * Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25C) * Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25C) * Output current 8 mA (@VCC = 3.0 V to 3.6 V), 16 mA (@VCC = 4.5 V to 5.5 V) Ordering Information
Part Name HD74LV245AFPEL HD74LV245ARPEL HD74LV245ATELL Package Type SOP-20 pin (JEITA) SOP-20 pin (JEDEC) TSSOP-20 pin Package Code FP-20DAV FP-20DBV TTP-20DAV Package Abbreviation FP RP T Taping Abbreviation (Quantity) EL (2,000 pcs/reel) EL (1,000 pcs/reel) ELL (2,000 pcs/reel)
Note: Please consult the sales office for the above package availability.
Function Table
Inputs OE L L H Note: H: High level L: Low level X: Immaterial DIR L H X Operation B data to A bus A data to B bus Isolation
Rev.3.00 Jun. 24, 2004 page 1 of 9
HD74LV245A
Pin Arrangement
DIR 1 A1 A2 2 3
20 VCC 19 OE 18 B1 17 B2 16 B3 15 B4 14 B5 13 B6 12 B7 11 B8
A3 4 A4 A5 A6 A7 A8 5 6 7 8 9
GND 10
(Top view)
Absolute Maximum Ratings
Item Supply voltage range Input voltage range*1 Output voltage range*1, *2 Input clamp current Output clamp current Continuous output current Continuous current through VCC or GND Maximum power dissipation at Ta = 25C (in still air)*3 Storage temperature Symbol VCC VI VO IIK IOK IO ICC or IGND PT Tstg Ratings -0.5 to 7.0 -0.5 to 7.0 -0.5 to VCC + 0.5 -0.5 to 7.0 -20 50 35 70 835 757 -65 to 150 Unit V V V mA mA mA mA mW C Conditions
Output: H or L VCC: OFF or Output: Z VI < 0 VO < 0 or VO > VCC VO = 0 to VCC
SOP TSSOP
Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded even if the input and output clamp-current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The data above are measured by VBE method mounting on glass epoxy board (40 x 40 x 1.6 mm) with 10% of wiring density.
Rev.3.00 Jun. 24, 2004 page 2 of 9
HD74LV245A
Recommended Operating Conditions
Item Supply voltage range Input voltage range Output voltage range Output current Symbol VCC VI VO IOH Min 2.0 0 0 0 -- -- -- -- -- -- -- -- 0 0 0 -40 Max 5.5 5.5 VCC 5.5 -50 -2 -8 -16 50 2 8 16 200 100 20 85 Unit V V V A mA Conditions
IOL
A mA
Input transition rise or fall rate
t /v
ns/V
Output: H or L High impedance state VCC = 2.0 V VCC = 2.3 to 2.7 V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V VCC = 2.0 V VCC = 2.3 to 2.7 V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V VCC = 2.3 to 2.7 V VCC = 3.0 to 3.6 V VCC = 4.5 to 5.5 V
Operating free-air temperature
Ta
C
Note: Unused or floating inputs must be held high or low.
Logic Diagram
DIR
1 19 2 18
OE
A1
B1
Other seven channels
Rev.3.00 Jun. 24, 2004 page 3 of 9
HD74LV245A
DC Electrical Characteristics
Ta = -40 to 85C Item Input voltage Symbol VIH VCC (V)*
1
Min 1.5 VCC x 0.7 VCC x 0.7 VCC x 0.7 -- -- -- -- VCC -0.1 2.0 2.48 3.8 -- -- -- -- -- -- -- -- -- --
Typ -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 3.0 5.5
Max -- -- -- -- 0.5 VCC x 0.3 VCC x 0.3 VCC x 0.3 -- -- -- -- 0.1 0.4 0.44 0.55 1 5 20 5 -- --
Unit V
Test Conditions
VIL
Output voltage
VOH
VOL
Input current Off-state output current Quiescent supply current Output leakage current Input capacitance Output capacitance
IIN IOZ*2 ICC IOFF CIN CO
2.0 2.3 to 2.7 3.0 to 3.6 4.5 to 5.5 2.0 2.3 to 2.7 3.0 to 3.6 4.5 to 5.5 Min to Max 2.3 3.0 4.5 Min to Max 2.3 3.0 4.5 0 to 5.5 5.5 5.5 0 3.3 3.3
V
A A A A pF pF
IOH = -50 A IOH = -2 mA IOH = -8 mA IOH = -16 mA IOL = 50 A IOL = 2 mA IOL = 8 mA IOL = 16 mA VIN = 5.5 V or GND VO = VCC or GND VIN = VCC or GND, IO = 0 VI or VO = 0 V to 5.5 V VI = VCC or GND VO = VCC or GND
Notes: 1. For conditions shown as Min or Max, use the appropriate values under recommended operating conditions. 2. For I/O ports, the parameter IOZ includes the input leakage current.
Rev.3.00 Jun. 24, 2004 page 4 of 9
HD74LV245A
Switching Characteristics
VCC = 2.5 0.2 V Ta = 25C Item Propagation delay time Enable time Disable time Symbol tPLH tPHL tZH tZL tHZ tLZ Min -- -- -- -- -- -- Typ 8.3 11.2 11.8 14.1 11.8 17.6 Max 13.0 15.9 19.9 22.7 18.1 23.1 Ta = -40 to 85C Min 1.0 1.0 1.0 1.0 1.0 1.0 Max 15.0 18.0 22.0 26.0 20.0 25.0 Unit ns ns ns Test Conditions CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF FROM (Input) A or B OE OE TO (Output) B or A A or B A or B
VCC = 3.3 0.3 V Ta = 25C Item Propagation delay time Enable time Disable time Symbol tPLH tPHL tZH tZL tHZ tLZ Min -- -- -- -- -- -- Typ 5.9 7.9 8.2 9.9 9.6 13.9 Max 8.4 11.9 13.2 16.7 16.5 19.8 Ta = -40 to 85C Min 1.0 1.0 1.0 1.0 1.0 1.0 Max 10.0 13.5 15.5 19.0 19.5 22.0 Unit ns ns ns Test Conditions CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF FROM (Input) A or B OE OE TO (Output) B or A A or B A or B
VCC = 5.0 0.5 V Ta = 25C Item Propagation delay time Enable time Disable time Symbol tPLH tPHL tZH tZL tHZ tLZ Min -- -- -- -- -- -- Typ 4.3 5.6 5.7 7.0 7.8 10.9 Max 5.5 7.5 8.5 10.6 12.8 14.7 Ta = -40 to 85C Min 1.0 1.0 1.0 1.0 1.0 1.0 Max 6.5 8.5 10.0 12.0 14.2 16.0 Unit ns ns ns Test Conditions CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF FROM (Input) A or B OE OE TO (Output) B or A A or B A or B
Output-skew Characteristics
CL = 50 pF Ta = 25C Item Output skew Symbol tsk (O) VCC (V) 2.3 to 2.7 3.0 to 3.6 4.5 to 5.5 Min -- -- -- Max 2.0 1.5 1.0 Ta = -40 to 85C Min -- -- -- Max 2.0 1.5 1.0 Unit ns
Note: Skew between any outputs of the same package switching in the same direction. This parameter is warranted but not production tested.
Rev.3.00 Jun. 24, 2004 page 5 of 9
HD74LV245A
Operating Characteristics
CL = 50 pF Ta = 25C Item Power dissipation capacitance Symbol CPD VCC (V) 3.3 5.0 Min -- -- Typ 20.0 25.0 Max -- -- Unit pF Test Conditions f = 10 MHz
Noise Characteristics
CL = 50 pF Ta = 25C Item Quiet output, maximum dynamic VOL Quiet output, minimum dynamic VOL Quiet output, minimum dynamic VOH High-level dynamic input voltage Low level dynamic input voltage Symbol VOL (P) VOL (V) VOH (V) VIH (D) VIL (D) VCC (V) 3.3 3.3 3.3 3.3 3.3 Min -- -- -- 2.31 -- Typ 0.5 -0.4 2.9 -- -- Max 0.8 -0.8 -- -- 0.99 Unit V V V V V Test Conditions
Test Circuit
VCC VCC
OE See Function Table Input Pulse generator Zout = 50 Output A1 B1 CL = 15 or 50 pF DIR TEST t PLH /tPHL t ZH/tHZ t ZL /tLZ Notes : 1. C L includes the probe and jig capacitance. 2. A2-B2 to A8-B8 are identical to above load circuit. 3. S1 : Input-Output change switch. S2 OPEN GND VCC S1 1 k S2 OPEN GND VCC
Rev.3.00 Jun. 24, 2004 page 6 of 9
HD74LV245A
* Waveform - 1
tr 90% 50% VCC t PLH 90% 50% VCC
tf VCC 10% t PHL 0V
Input 10%
VOH In phase output 50% VCC 50% VCC VOL
* Wareform - 2
90%
tf
tr 90% 50% VCC 10% t LZ VCC 0V VCC 50% VCC t ZH t HZ VOH - 0.3 V VOL + 0.3 V VOL VOH 0V
OE
50% VCC 10% t ZL
Waveform - A
Waveform - B
50% VCC
Notes: 1. Input waveform: PRR 1 MHz, Zo = 50 , tr 3 ns, tf 3 ns 2. Waveform-A is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform-B is for an output with internal conditions such that the output is high except when disabled by the output control. 4. The output are measured one at a time with one transition per measurement.
Rev.3.00 Jun. 24, 2004 page 7 of 9
HD74LV245A
Package Dimensions
As of January, 2002
12.6 13 Max
20
Unit: mm
11
1
10
5.5
0.80 Max
2.20 Max
*0.20 0.05
0.20 7.80 + 0.30 -
1.15
1.27
*0.40 0.06
0.10 0.10
0 - 8
0.70 0.20
0.15
0.12 M
*Pd plating
Package Code JEDEC JEITA Mass (reference value)
FP-20DAV -- Conforms 0.31 g
As of January, 2003
12.8 13.2 Max 20 11
Unit: mm
2.65 Max
1 0.935 Max
10
7.50
*0.25 0.05
0.25 10.40 + 0.40 -
1.45
0.20 0.10
0 - 8
0.57 0.70 + 0.30 -
1.27
*0.40 0.06
0.15 0.12 M
*Ni/Pd/Au plating Package Code JEDEC JEITA Mass (reference value) FP-20DBV Conforms -- 0.52 g
Rev.3.00 Jun. 24, 2004 page 8 of 9
HD74LV245A
As of January, 2002
Unit: mm
6.50 6.80 Max 20 11
1
10 0.65 1.0 6.40 0.20 0.65 Max
*0.20 0.05
0.13 M
4.40
*0.15 0.05
1.10 Max
0.10
0.07 +0.03 -0.04
0 - 8
0.50 0.10
*Pd plating
Package Code JEDEC JEITA Mass (reference value)
TTP-20DAV -- -- 0.07 g
Rev.3.00 Jun. 24, 2004 page 9 of 9
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
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